DOCUMENT ID:  1326-02

SYNOPSIS:     A description of virtual cache

OS RELEASE:   2.4

PRODUCT:      Solaris

KEYWORDS:     virtual address cache cpu mmu buffer


DESCRIPTION:

A virtual cache is a high-speed buffer between the CPU and MMU


Virtual Address Cache

A virtual cache is a high-speed buffer between the CPU and the MMU.

  ------

  Stack

  ------

  Hole                                     Physical
                                           address
  ------   CPU --------> Cache -----> MMU ----------> Physical memory
               Virtual
  Data         address

  ------

  Text

  ------

Static random access memory (SRAM) is used for cache.  Dynamic random
access memory (DRAM) is used for main memory.  The access time for SRAM
chips is between 10 and 50 nanoseconds; whereas the access time for DRAM
chips is in the hundreds of nanoseconds.  The internal nature of the
SRAM chip (noncapacative) means that it is much faster.  When the CPU
accesses and address, it checks to see if the data for that address is
in the cache.  If it is, the data is loaded without stalling.  Otherwise
the cache block must be loaded, possibly stalling the CPU for several
cycles.

A virtually addressed cache uses virtual addresses to decide which
location in cache has the required data in it.  The advantage to this
scheme is that an MMU translation can be avoided if the data is found in
cache.  The disadvantage to this is the fact that cache aliasing
problems can arise much easier. 


DATE APPROVED: 05/08/95